The present invention relates generally to a thermal interface, and relates more particularly to the cooling of integrated circuit chips. Specifically, the present invention relates to a heterogeneous thermal interface for chip cooling.
Efficient cooling of integrated circuit (IC) devices is essential to prevent failure due to excessive heating. As the number of CMOS devices per chip and clock speeds have increased, such efficient cooling has become an even more prominent concern. Efficient cooling of the IC chips depends in large part on a good thermal interface between the chips and cooling blocks, or heat sinks, because a major part of the heat resistance budget is expended between the chip and the heat sink.
Conventionally, the thermal interface between a chip and a heat sink includes a thin layer of thermally conductive paste disposed between opposing surfaces of the chip and the heat sink unit. Typically, the layer of paste is approximately 100 microns thick and is mechanically compliant to conform to the sometimes irregular surfaces of the chip and heat sink.
Such conductive pastes have generally proven to be reliable in facilitating heat transfer. However, the thermal conductivity of conventional pastes is generally limited (e.g., typical pastes have a thermal conductivity of approximately 0.1 W/mK). Thus, limited chip cooling is achieved. Furthermore, heavy cycling may cause non-uniform behavior in a paste, or may cause a paste to fail to thermally bond the chip to the heat sink, resulting in thermal run-away and also limiting chip cooling. Moreover, the trend towards smaller, more powerful chips that generate even greater amounts of heat makes reliance on thermal pastes inadequate.
Thus, there is a need for a thermal interface that is capable of establishing reliable thermal contact, and of providing sufficient thermal conductivity and mechanical compliance between a chip and a heat sink.